The AI buildout has a power problem, and the part most people are arguing about is the wrong part. The grid, the natural gas turbines, the nuclear reactor restarts — that is the megawatt story. It matters. But inside every AI data center, there is a second power problem that gets almost no attention, and it is closer to the silicon than any utility will ever touch. For the megawatt-side counterpart — why hyperscalers are signing nuclear and gas-turbine deals at scale — see the AI data center energy crisis explainer.
A modern AI accelerator — the GPU sitting in the rack doing the actual training — draws roughly 1,000 amps of continuous current at 0.7 volts. Peak demand hits 2,000 amps. When the workload shifts, which it does thousands of times per second, the current swings at 2,000 amps per microsecond. The supply voltage has to stay within plus or minus 5 percent of target the entire time, or the transistors stop working.
Getting 2,000 amps through a fraction of an inch of copper without losing voltage or generating destructive heat is a physics problem that most of the AI conversation treats as an engineering detail. It is not an engineering detail. Power delivery at the chip level is the constraint that determines whether the compute roadmap scales or stalls. And the company that has been working on it for 44 years just won an import ban against the largest contract manufacturers in the world to prove it.
The last inch
The distance between where power enters a server and where it arrives at the processor die is short. The industry calls it the “last inch.” That inch of copper trace on a printed circuit board has resistance. Resistance turns current into heat. The formula is simple and merciless: P equals I squared times R. Push 800 amps through 70 microhms of copper and you lose 45 watts — not to computation, not to memory bandwidth, just to the copper carrying the current.
That 45 watts is not a rounding error. On a single accelerator module, it is real money. Across a data center running 64 modules per rack, it is 3,200 watts of pure waste, 24 hours a day, 365 days a year. At industrial power rates, that is millions of dollars annually per facility, spent heating copper that does no computing.
The conventional solution is multiphase voltage regulation: arrange 30 or more voltage regulator phases laterally around the processor, spreading the current across more copper paths to reduce the loss per path. This works, up to a point. The problem is that adding phases consumes printed circuit board space, and the space consumed pushes the conversion point farther from the processor, which raises the resistance again. The architecture fights itself. You add phases to cut loss, and the phases create loss by occupying real estate that forces the converter farther away.
There is also a physical limit. Conventional multiphase regulators achieve roughly 1 amp per square millimeter of current density. That is the state of the art for magnetic-based voltage regulation. The bypass capacitors that absorb transient current swings already occupy most of the space directly beneath the processor, because they need to sit as close as physics allows. There is no room left to put a conventional voltage regulator in that zone without tripling its current density — and conventional architecture cannot triple.
The physicist who saw it coming in 1981
The problem of converting grid power into the microscopic voltages and massive currents that processors need is not new. It has been the constraint behind every generation of computing, from mainframes to personal computers to smartphones. The reason your phone charger is smaller than a deck of cards instead of the size of a brick is four decades of power conversion engineering.
One person has been working this specific problem longer than almost anyone in the industry. Patrizio Vinciarelli earned a doctorate in physics from the University of Rome, spent the 1970s as a fellow at CERN and the Institute for Advanced Study in Princeton, and then left academia for a reason that will sound familiar to anyone who has spent time in research: the field was slowing down, and he wanted to build something.
In 1981, Vinciarelli founded a power electronics company in Andover, Massachusetts. His first product, shipped in 1984, delivered 25 watts per cubic inch of power density — roughly 20 times denser than anything on the market at the time. He achieved it by running switching frequencies at 10 to 15 times higher than what the industry considered feasible, using a technique called zero-current, zero-voltage switching that he invented and patented.
By 2024, that same company was delivering products with power density in the range of 10,000 watts per cubic inch. Relative to the state of the art in 1980, that is a 10,000-fold improvement. Vinciarelli holds more than 100 patents in power conversion technology. The IEEE awarded him its William E. Newell Power Electronics Award in 2019, the highest recognition in the field.
None of this is marketing. It is public record: corporate filings, IEEE publications, patent filings, earnings transcripts. The man spent 44 years building a moat around a physics problem that the AI industry did not know it had until approximately 2023.
Vertical power delivery: moving the converter under the chip
The architectural answer to the last inch problem is called vertical power delivery. Instead of placing voltage regulators laterally around the processor, you place the current conversion module directly underneath the processor die, on the opposite side of the printed circuit board. Current travels vertically through the board instead of laterally across copper traces, and the distance shrinks from centimeters to millimeters while resistance drops by a factor of 20 to 50.
The numbers are significant. The Andover company’s own testing, published in technical literature, measured printed circuit board dissipation dropping from 60 watts in a lateral configuration to 11 watts in a lateral-vertical hybrid at 1,000 amps of continuous load. A full vertical delivery implementation reduces power delivery network impedance by up to 50 times compared to conventional multiphase solutions. On a single accelerator module, that is roughly 100 watts saved. Across a 20,000-module supercomputer, it is 2 megawatts, or about 17.5 gigawatt-hours annually at continuous operation.
The catch is current density. To fit a vertical power delivery module in the space beneath the processor — the same space currently occupied by the bypass capacitor array — the module needs to achieve roughly 3 amps per square millimeter of current density, triple what conventional magnetic-based regulators can deliver. Vinciarelli’s company achieves this through a topology called current multiplication, which uses transformers to multiply current by factors of 48 to 60 times rather than the 10 to 20 times available from conventional voltage averaging architectures. The modules switch above 1 megahertz at 94 percent efficiency, using zero-voltage and zero-current switching to avoid the magnetic energy storage that limits conventional designs.
This is not a laboratory concept. The company is shipping second-generation vertical power delivery products built on fifth-generation current multiplier technology, packaged in a 1.5-millimeter thermally adept format. The Q3 2025 earnings call confirmed licensing deals in every quarter of the year, with a licensing run rate hitting $90 million annually. The chief executive told analysts the company expects to sign up “each OEM and each hyperscaler in the AI space” over the next couple of years.
The import ban: why the patent moat matters now
In February 2025, the U.S. International Trade Commission issued a Limited Exclusion Order against several of the largest contract manufacturers in the world. The ruling found that power converter modules produced by Delta Electronics, Quanta Computer, Foxconn affiliates, and others infringed two patents held by the Andover company. The order bars importation of the infringing modules and any computing systems containing them into the United States. The bond during the presidential review period was set at 100 percent of the system’s value — meaning importers had to post a bond equal to the full price of every server they brought in containing the infringing components.
The exclusion order remains in effect for the life of the patents. It applies beyond the companies named in the original case. Because the order covers systems manufactured by or on behalf of the respondents, any hyperscaler or original equipment manufacturer sourcing power modules from those contract manufacturers is exposed. The Andover company’s Q3 2025 earnings call confirmed that this exposure has already produced settlements and licensing agreements with leading original equipment manufacturers and hyperscalers, contributing nearly $300 million in expected revenue through 2026.
In January 2026, the company filed a new lawsuit in the Western District of Texas against Monolithic Power Systems and several of its contract manufacturing partners, including Wistron, Wiwynn, and Quanta. The complaint alleges that a specific power module marketed as a “non-isolated, fixed 4:1 ratio” bus converter infringes a patent issued in August 2025 covering series-connected power distribution architecture. The accused module appears on AMD MI325X GPU boards, according to the complaint. The International Trade Commission instituted a parallel investigation in February 2026.
The legal specifics matter less than the structural point. Power conversion architecture for AI accelerators is patented, contested, and enforceable at the border. The company that holds the deepest patent portfolio has been building it since the Reagan administration.
The chokepoint logic
This is where the story connects to the investment thesis several financial publishers have been promoting around AI chokepoints. The argument, in its strongest form, goes like this: AI training requires enormous compute. Compute requires enormous power. Power delivery at the chip level is a solved physics problem with a patent moat around it. The companies that control the chokepoints — the layers in the stack where there is no substitute — capture disproportionate value as AI infrastructure spending scales.
The chokepoint framing is structurally sound. Whether the specific picks promoted alongside it are the right exposure at the right price is a separate question, and one that belongs in a subscription review, not a physics guide. What the physics says is unambiguous: the last inch of copper is a real constraint, the architectures that solve it are patented, and the company that pioneered them has an import ban and a litigation pipeline enforcing its position. The demand for AI compute is growing faster than the power delivery infrastructure can scale, and the bottleneck is moving from the grid into the server.
What changes if vertical power delivery wins
If vertical power delivery becomes the standard architecture for AI accelerators above 1,000 amps — and the current roadmap suggests it will, because conventional multiphase regulation cannot reach the required current density — the implications extend beyond any single company’s revenue.
Data center design changes. The printed circuit board area above the processor opens up entirely for high-speed input/output and memory routing, because the power delivery moves underneath. Cooling design changes, because the thermal profile of a vertical power module differs from a lateral one. Server rack architecture changes, because the per-module power budget shifts when 100 watts per module moves from waste heat into usable compute. The supply chain changes, because every hyperscaler and original equipment manufacturer building AI infrastructure at scale needs either a license or a vertical power delivery module from the patent holder.
The physics does not care about the investment narrative. It cares about current, resistance, and heat. The companies building AI infrastructure are running into a wall that has been visible to power electronics engineers for years and is now visible to everyone else. The wall is the last inch of copper. The question is whether the architecture that solves it scales fast enough to keep up with the compute roadmap, or whether power delivery becomes the constraint that defines the pace of AI progress for the next decade.
The answer is being built right now, in a factory in Andover, Massachusetts, by a former theoretical physicist who started working on the problem 44 years ago because his stereo amplifier broke.
For the grid-level counterpart — why hyperscalers are building their own power plants, and why the megawatt story matters even though the last inch is the harder physics — see the AI data center power bottleneck explainer.
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